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IRS26072DSPbF
The UVLO protection ensures that the HVIC drives external power devices only with a gate supply voltage
sufficient to fully enhance them. Without this protection, the gates of the external power switches could be driven
with a low voltage, which would result in power switches conducting current while with a high channel impedance,
which would produce very high conduction losses possibly leading to power device failure.
V CC
(or V BS )
V CCUV +
V CCUV -
( or V BSUV + )
(or V BSUV - )
Time
UVLO Protection
( Gate Driver Outputs Disabled)
Normal
Operation
Normal
Operation
The 1 line shows that for V CC below the UVLO threshold both the gate driver outputs LO and HO are disabled.
Figure 8: UVLO protection
Truth Table: Under-Voltage lockout
Table 2 provides the truth table for the IRS26072D HVIC.
st
After V CC returns above V CCUV , the gate driver outputs return functional.
The 2
nd
line shows that for V BS below the UVLO threshold, the gate driver output HO is disabled. After V BS returns
above V BSUV , HO remains low until a new rising transition of HIN is received.
The last line shows the normal operation of the HVIC.
VCC
VBS
outputs
LO
HO
UVLO V CC
<V CCUV
0
0
UVLO V BS
Normal operation
15 V
15 V
<V BSUV
15 V
LIN
LIN
0
HIN
Table 2: UVLO truth table
www.irf.com
14
? 2009 International Rectifier
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